Semiconductor integrated circuits (ICs) are fabricated with a large number of interconnected components such as transistors and the like. As ICs become larger and more complex there is a continuing trend toward reducing the feature size of the components. As the minimum feature size, that is the minimum width of a line or space, continues to decrease, it becomes more and more difficult to reliably produce the ICs with an acceptably high yield.
ICs are fabricated by sequentially patterning layers of insulators, semiconductor materials, conductors and the like. The patterning is accomplished by lithographic and etch processes that reproduce a mask image on the layer to be patterned. As the feature size has decreased with each succeeding generation of ICs, the lithography processes have implemented changes to reliably reproduce the smaller features. At a feature size of about 40 nanometers (nm) or less, however, the present techniques have reached a point at which certain features, especially isolated trenches, cannot be reliably resolved with state-of-the-art processes.
Accordingly, it is desirable to provide methods for fabricating integrated circuits using optical lithography techniques. In addition, it is desirable to provide methods for fabricating integrated circuits using a litho-etch, litho-etch technique for etching trenches as part of the integrated circuit. Furthermore, other desirable features and characteristics of the present disclosure will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.